NTE2532
Integrated Circuit
NMOS, 32K EPROM, 300ns
Description:
The NTE2532 is a 32,768bit, ultravioletlighterasable, electricallyprogrammable readonly
memory in a 24Lead DIP type package. This device is fabricated using Nchannel silicongate
technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including
program data inputs) can be directly driven by Series 74 TTL circuits without the use of external pull
up reistors, and each output can drive one Series 74 circuit without external resistors. The data out-
puts are threestate for connecting mutiple devices to a common bus.
Since the NTE2532 operates from a single +5V supply (in the read mode), it is ideal for use in micro-
processor systems. One other (+25V) supply is needed for programming but all programming signals
are TTL level, requiring a single 10ms pulse. For programming outside of the system, existing
EPROM programmers can be used. Locations may be programmed singly, in blocks, or at random.
Total programming time for all bits is 41 seconds.
Features:
D
Organization: 4096 x 8
D
Single +5V Power Supply
D
All Inputs/Outputs Fully TTL Compatible
D
Static Operation (No Clocks, No Refresh)
D
Max Acces/Min Cycle Time: 300ns
D
8Bit Output for Use in Microprocessor Based Systems
D
NChannel SiliconGate Technology
D
3State Output Buffers
D
Low Power Dissipation:
Active 400mW Typical
Standby 100mW Standby
D
Guaranteed DC Noise Immunity with Standard TTL Loads
D
No PullUp Resistors Required
Absolute Maximum Ratings: (T
A
= 0
to +70
C, Note 1 unless otherwise specified)
Supply Voltage (Note 2), V
CC
0.3V to +7V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage (Note 2), V
PP
0.3V to +28V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
All Input Voltages (Note 1)
0.3V to +7V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage (Operating, with Respect to V
SS
)
0.3V to 7V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Ambient Temperature Range, T
A
0
to +70
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature Range, T
stg
55
to +150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Note 1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and functional operation of the device at these
or any other conditions beyond those indicated in the "Recommended Operation Conditions"
section of this specification is not implied. Exposure to absolutemaximumrated conditions
for extended periods may affect device reliability.
Note 2. Under absolute maximum ratings, voltage values are with respect to the most negative supply
voltage, V
S
(substrate).
Recommended Operating Conditions:
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Voltage
V
CC
Note 3
4.75
5.0
5.25
V
V
PP
Note 4
V
CC
V
V
SS
0
V
High Level Input Voltage
V
IH
2
V
CC
+1
V
Low Level Input Voltage
V
IL
0.1
+0.8
V
Read Cycle Time
t
c(rd)
300
ns
Operating Ambient Temperature
T
A
0
70
C
Note 3. V
CC
must be applied before or at the same time as V
PP
and removed after or at the same
time as V
PP
. The device must not be inserted into or removed from the board when V
PP
is
applied.
Note 4. V
PP
can be connected to V
CC
directly (except in the programming mode). V
CC
supply current
in this case would be I
CC
+ I
PP
. During programming, V
PP
must be maintained at 25V (
1V).
Electrical Characteristics: (Over full range of recommended operating conditions)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
High Level Output Voltage
V
OH
I
OH
= 400
A
2.4
V
Low Level Output Voltage
V
OL
I
OL
= 2.1mA
0.45
V
Input Current (Leakage)
I
l
V
I
= 0V to 5.25V
10
A
Output Current (Leakage)
I
O
V
O
= 0.4V to 5.25V
10
A
V
PP
Supply Current
I
PP1
V
PP
= 5.25V, PD/PGM = V
IL
12
mA
V
PP
Supply Current (During Program Pulse)
I
PP2
PD/PGM = V
IL
30
mA
V
CC
Supply Current (Standby)
I
CC1
PD/PGM = V
IH
20
30
mA
V
CC
Supply Current (Active)
I
CC2
PD/PGM = V
IL
80
160
mA
Capacitance: (Over recommended voltage and operating ambient temperature range, f = 1MHz,
Note 5, Note 6)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Capacitance
C
i
V
I
= 0V, f = 1MHz
4
6
pF
Output Capacitance
C
o
V
O
= 0V, f = 1MHz
8
12
pF
Note 5. All typical values are at T
A
= +25
C and nominal voltages.
Note 6. Capacitance measurements are made on a sample basis only.
Switching Characteristics: (Over full range of recommended operating conditions, Note 5, Note 8)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Access Time from Address
t
a(A)
C
L
= 100pF,
300
ns
Access Time from PD/PGM
t
a(PR)
1 Series 74 TTL Load,
t
r
20ns, t
f
20ns,
300
ns
Output Data Valid after Address Change
t
v(A)
t
r
20ns, t
f
20ns,
Note 8, Note 9
0
ns
Output Disable Time from PD/PGM (Note 7)
t
dis
100
ns
Note 5. All typical values are at T
A
= +25
C and nominal voltages.
Note 7. Value calculated from 0.5V delta to measured output level
Note 8. Timing measurement reference levels: inputs 0.8V and 2V, outputs 0.65V and 2.2V.
Note 9. Common test conditions apply for t
dis
except during programming. For t
a(A)
and t
dis
,
PD/PGM = V
IL
.
Recommended Timing Requirement for Programming: (T
A
= +25
C, Note 8, Note 10)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Pulse Duration, Program Pulse
t
w(PR)
9
ms
Rise Time, Program Pulse
t
r(PR)
5
ns
Fall Time, Program Pulse
t
f(PR)
5
ns
Address Setup Time
t
su(A)
2
s
Data Setup Time
t
su(D)
2
s
Setup Time for V
PP
t
su(VPP)
0
ns
Address Hold Time
t
h(A)
2
s
Data Hold Time
t
h(D)
2
s
Program Pulse Hold Time
t
h(PR)
0
ns
V
PP
Hold Time
t
h(VPP)
2
s
Note 8. Timing measurement reference levels: inputs 0.8V and 2V, outputs 0.65V and 2.2V.
Note10. Typical values are at nominal voltages.
Operation:
Function (Pins)
Mode
Read
Output Disable
Power Down
Start Programming Inhibit Programming
PD/PGM (20)
V
IL
V
IH
V
IH
Pulsed V
IH
to V
IL
V
IH
V
PP
(21)
+5V
+5V
+5V
+25V
+25V
V
CC
(24)
+5V
+5V
+5V
+5V
+5V
Q (9 to 11, 13 to 17)
Q
HighZ
HighZ
D
HighZ
Read/Out Disable
When the outputs of two or more NTE2532s are connected on the same bus, the output of any particular
device in the circuit can be read with no interference from the cpmpeting outputs of the other devices.
The device whose output is to be read should have a lowlevel TTL signal applied to the PD/PGM pin.
Output data is accessed at pins Q1 through Q8.
Power Down
Active power dissipation can be cut by over 70% by applying a high TTL signal to the PD/PGM pin.
In this mode all outputs are in a highimpedance state.
Erasure
Before programming, the NTE2532 is erased by exposing the chip through the transparent lid to high
intensity ultraviolet light having a wavelength of 253.7nm (2537 angstroms). The recommended mini-
mum exposure dose (UV intensity time exposure time) is fifteen wattseconds per square centimeter.
Thus, a typical 12 miliwatt per square centimeter filterless UV lamp will erase the device in a minimum
of 21 minutes. The lamp should be located about 2.5 centimeters (1 inch) above the chip during era-
sure. After erasure, all bits are in the "1" state (assuming highlevel output corresponds to logic "1").
It should be noted that normal ambient light contains the correct wavelenght for erasure. Therefore
when using the NTE2532, th window should be covered with an opaque label.
Start Programming
After erasure (all bits in logic "1" state), logic "0's" are programmed into the desited locations. A "0"
can be erasedonly by ultraviolet light. The programming mode is achieved when V
PP
is 25V. Data is
presented in parallel (8 bits) on pins Q1 through Q8. Once addresses and data are stable, a 10milli-
second TTL lowlevel pulse should be applied the the PGM pin at each address location to be pro-
grammed. Maximum pulse width is 44 milliseconds. Locations can be programmed in any order. Sev-
eral NTE2532s can be programmed simultaneously when the devices are connected in parallel.
Inhibit Programming
When two or more devices are connected in parallel, data can be programmed into all devices or only
chosen devices. Any NTE2532 not intended to be programmed should have a high level applied to
PD/PGM.
Programming Verification
The NTE2532 program verification is simply the read operation, which can be performed as soon as
V
PP
returns to +5V ending the program cycle.
PD/PGM
V
PP
V
CC
Pin Connection Diagram
V
SS
Q4
A8
Q7
A11
Q8
1
2
3
4
A7
A6
A5
A4
5
A3
6
A2
7
A1
8
A0
24
23
22
21
A9
20
19
A10
18
17
9
Q1
16
Q6
Q5
10
Q2
11
Q3
15
14
12
13
.160 (4.06) Max
.520
(13.2)
1
12
24
13
.280 (7.11) Dia UV Window
Glass Sealant
.200 (5.08)
Max
.100 (2.54)
.600 (15.24) Max Glass
1.290 (32.76) Max
.670 (17.02)
.125
(3.17)
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